In recent years, it has become necessary, with an increasingly finer structure of a semiconductor device, to form a pattern in dimensions less than the resolution limit of exposure light. However, in conventional lithography technology, it has been difficult to form a pattern of such fine dimensions. Faced with such a problem, technology typically like sidewall processing process technology that forms a pattern in dimensions less than the resolution limit of exposure light has been adopted. In the sidewall processing process, first a film pattern to be a core material in lithography technology is formed and the core material is slimmed until the line width is reduced to half the dimension. Then, a sidewall pattern of the same width is formed on the sidewall of the core material and then the core material is removed to form a hard mask pattern of half the size of the line width formed by using lithography technology. Thus, if a film pattern to be a core material is formed in dimensions close to the resolution limit of exposure light, a hard mask in dimensions less than the resolution limit can be formed in the end.
Then, it is necessary to repeat sidewall processing twice to form a pattern ¼ the lithography exposure dimension. However, in such a technique, it is necessary to form a film for the second sidewall processing in a lower layer of film formation for the first sidewall processing. Thus, a problem such as an increased number of processes is caused. Further, increased costs due to the increased number of processes pose a problem. In addition, dimensional variations are increased by repeating the sidewall processing twice, leading to a problem of increased difficulty of dimensional control.